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![[Figure 1]](gm5039fig1mag.jpg)
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Figure 1
Three-layer device layout. (a) Schematic representation of chip layers. (b) Cut-away view of the imaging chamber of the assembled chip with a 150 nm thick silicon nitride window, 15 µm thick photoresist and 8 µm thick Kapton film layer. (c) 100 mm diameter wafer patterned with 24 5 × 30 mm devices. (d) Photograph of a single 5 × 30 mm device (silicon nitride layer only). |
![[Figure 1]](gm5039fig1.jpg)
 | STRUCTURAL BIOLOGY |
ISSN: 2059-7983
