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Figure 6
The noise performance obtainable with an optimum design approach of the floating-diffusion amplifier, plotted according to the equations of MPCCD design trade-offs reported in Appendix B of Kameshima et al. (2014BB34). The solid curves indicate a trade-off with a constant dynamic range (DR = peak signal/electronic noise) of 12, 14 and 16 bits. As the readout frequency increases, the noise becomes worse. The bold solid line indicates an estimate of the noise level manufacturable using today's scientific CCD processes. For a higher readout rate, the manufacturability limit becomes significant in terms of the achievable noise. The dashed curves represent the MPCCD phase I and phase III-L cases, with dynamic ranges of 15.4 and14.4 bits, respectively. Note that the noise values of the MPCCDs are larger by 21/2 than standard CCDs due to their quasi-differential amplifier scheme, which enables robust operation through higher rejection of external noise.

IUCrJ
Volume 2| Part 3| April 2015| Pages 371-383
ISSN: 2052-2525
doi:10.1107/S205225251500010X