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Figure 1
(a) Photograph of the PCB supporting the detector with a single (2 × 2 cm2) chip. (b) A schematic representation of the layers of a hybrid pixel detector.

IUCrJ
Volume 5| Part 2| March 2018| Pages 190-199
ISSN: 2052-2525
https://doi.org/10.1107/S2052252518000945