view article

Figure 2
Schematic diagram of the logic components of the PAD system. The amplifier/buffer is an operational amplifier follower (AD845, Analog Devices, Norwood, MA, USA) with a gain of 2, which serves to scale the output voltage of the PAD chip to the input range of the analog-to-digital converter (ADC4322, Analogic Corporation, Wakefield, MA, USA). Numbers above hatch marks indicate the number of signals in the respective buses. 15 m cables separate the detector module from the host PC. Power supplies are omitted for clarity.

Journal logoJOURNAL OF
ISSN: 1600-5775
Follow J. Synchrotron Rad.
Sign up for e-alerts
Follow J. Synchrotron Rad. on Twitter
Follow us on facebook
Sign up for RSS feeds