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Figure 2
Schematic diagram of the logic components of the PAD system. The amplifier/buffer is an operational amplifier follower (AD845, Analog Devices, Norwood, MA, USA) with a gain of 2, which serves to scale the output voltage of the PAD chip to the input range of the analog-to-digital converter (ADC4322, Analogic Corporation, Wakefield, MA, USA). Numbers above hatch marks indicate the number of signals in the respective buses. 15 m cables separate the detector module from the host PC. Power supplies are omitted for clarity.

Journal logoJOURNAL OF
SYNCHROTRON
RADIATION
ISSN: 1600-5775
Volume 6| Part 6| November 1999| Pages 1096-1105
doi:10.1107/S0909049599009802
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