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Figure 9
(a) Block diagram of the mixed-mode pixel. During the integration period, the voltage at the integrator output is continuously compared with a threshold level. When this level is reached, an in-pixel counter is incremented and integrator stage is reset for the next cycle. At the end of the X-ray integration period, both the residual analog voltage of the integrator stage and the digital counts corresponding to the number of overflows is read out. Such a structure retains the high-count-rate capability of an integrating detector while extending the single-frame dynamic range significantly. (b) Oscilloscope plot from the first functional mixed-mode pixel; the triangular wave is the integrator stage output. The second trace is the count pulse sent to the in-pixel counter whenever an analog overflow occurs. Preliminary tests showed good linearity and stability; however, noise performance, especially during reset phase, required improvements.

Journal logoJOURNAL OF
SYNCHROTRON
RADIATION
ISSN: 1600-5775
Volume 13| Part 2| March 2006| Pages 110-119
https://doi.org/10.1107/S0909049505028529
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