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Figure 5
The upper panel shows the timing scheme of the camera exposure and readout. The lower panel shows the timing scheme of a single pixel period, explaining the principle of the DCDS: the video signal of the pixel period above is sampled via a fast ADC (analog-to-digital converter) and each sample [X(i)] is weighted with a coefficient (see text for explanation).

Journal logoJOURNAL OF
ISSN: 1600-5775
Volume 21| Part 6| November 2014| Pages 1240-1246
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