view article

Figure 5
The upper panel shows the timing scheme of the camera exposure and readout. The lower panel shows the timing scheme of a single pixel period, explaining the principle of the DCDS: the video signal of the pixel period above is sampled via a fast ADC (analog-to-digital converter) and each sample [X(i)] is weighted with a coefficient (see text for explanation).

Journal logoJOURNAL OF
SYNCHROTRON
RADIATION
ISSN: 1600-5775
Volume 21| Part 6| November 2014| Pages 1240-1246
Follow J. Synchrotron Rad.
Sign up for e-alerts
Follow J. Synchrotron Rad. on Twitter
Follow us on facebook
Sign up for RSS feeds