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Figure 3
The multiple layers of the sample chip (yellow is copper, white is insulator): (a) TEY pad; (b) sample pad; (c) bonding pad; (d) internal copper track connecting a tulip pin and a bonding pad; (e) tulip pin. |
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Figure 3
The multiple layers of the sample chip (yellow is copper, white is insulator): (a) TEY pad; (b) sample pad; (c) bonding pad; (d) internal copper track connecting a tulip pin and a bonding pad; (e) tulip pin. |