view article
Figure 2
Each ASIC is divided into eight banks of pixels. Each bank is 129 × 16 pixels with a dedicated analog output for each bank. Rows are addressed in parallel across all banks with bank-wise analog multiplexers at the top of the columns.

Journal logoJOURNAL OF
SYNCHROTRON
RADIATION
ISSN: 1600-5775
Volume 23| Part 2| March 2016| Pages 395-403
doi:10.1107/S1600577515022754
Follow J. Synchrotron Rad.
Sign up for e-alerts
E-alerts
Follow J. Synchrotron Rad. on Twitter
Twitter
Follow us on facebook
Facebook
Sign up for RSS feeds
RSS