view article
Figure 2
The TEMPUS single-chip prototype in its housing. The design of the carrier board allows for minimal dead area when a second system is placed on the top. Inputs to the system such as bias voltage, external trigger or digital pixels can be seen. Also, the optical cables connecting to the slow control and the high-speed data-links are visible.

Journal logoJOURNAL OF
SYNCHROTRON
RADIATION
ISSN: 1600-5775
Volume 31| Part 5| September 2024|
https://doi.org/10.1107/S1600577524005319
Follow J. Synchrotron Rad.
Sign up for e-alerts
E-alerts
Follow J. Synchrotron Rad. on Twitter
Twitter
Follow us on facebook
Facebook
Sign up for RSS feeds
RSS