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Figure 2
Simplified block diagram of the signal readout scheme. Pixel 1 to pixel 4 form a representative macro-pixel, with pixel 1 as the master. The architecture of pixel 2 to pixel 4 is the same as pixel 1, except that the output of the multiplexer after the retrigger logic goes either to the local counter or to the binning logic of pixel 1. The readout occurs row-by-row.

Journal logoJOURNAL OF
SYNCHROTRON
RADIATION
ISSN: 1600-5775
Volume 33| Part 1| January 2026| Pages 98-105
https://doi.org/10.1107/S1600577525009026
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