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Figure 2
Photograph of the 3FI ASIC with visible wire-bonding pads placed on one side, being compatible with three-side buttable detector designs, periphery blocks for chip control, pixels and EDWARD logic layout are placed in between them.

Journal logoJOURNAL OF
SYNCHROTRON
RADIATION
ISSN: 1600-5775
Volume 33| Part 1| January 2026| Pages 154-161
https://doi.org/10.1107/S1600577525010501
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