Comprehensive characterization of TSV etching performance with phase-contrast X-ray microtomography

Comprehensive evaluation of through-silicon via (TSV) reliability often requires deterministic and 3D descriptions of local morphological and statistical features of via formation with the Bosch process. Here, a highly sensitive phase-contrast X-ray microtomography approach is presented based on recorrection of abnormal projections, which provides comprehensive and quantitative characterization of TSV etching performance. The key idea is to replace the abnormal projections at specific angles in principles of linear interpolation of neighboring projections, and to distinguish the interface between silicon and air by using phase-retrieval algorithms. It is demonstrated that such a scheme achieves high accuracy in obtaining the etch profile based on the 3D microstructure of the vias, including diameter, bottom curvature radius, depth and sidewall angle. More importantly, the 3D profile error of the via sidewall and the consistency of parameters among all the vias are achieved and analyzed statistically. The datasets in the results and the 3D microstructure can be applied directly to a reference and model for further finite element analysis. This method is general and has potentially broad applications in 3D integrated circuits.

1. Introduction

The ever-increasing demands on the Internet of Things and artificial intelligence have spurred efforts to develop 3D integrated circuit systems. As is well known, 3D integration is a key technology for integrating heterogeneous components with diversified functions, and the stacked chips are called `three-dimensional integrated circuits' (3D ICs). The advantages of 3D ICs include shorter electrical interconnects and less resistive–capacitive delay, smaller form factor and smaller size, and much more interconnects and higher bandwidth, compared with conventional 2D integration (Fedder et al., 2008; Lin, 2019). The through-silicon via (TSV) is a key technique to achieve 3D integration, and acts as an interconnection between ICs for signal and power transmissions. TSV etching is the first step in the fabrication process of TSVs, and affects all of the subsequent procedures (Lin, 2019). TSV etching defects which result in interconnecting failures include bottom-corner notch, Si grass at the bottom of the TSV, and surface roughness and scallops from the Bosch process (Choi et al., 2014; Shen & Chen, 2017; Malta, 2014). The parameters for profiles of TSV etching include top and bottom dimensions, depth, sidewall roughness and coplanarity, and scallop size (period and amplitude), which need to be monitored and controlled (Fursenko et al., 2015). A variety of microscopic methods are employed to measure the profile parameters for TSV etching.

The widely used method is to use a scanning electron microscope (SEM), which features extremely high spatial resolution down to the nanometre scale, and specializes in surface morphology like sidewall scalloping roughness (Ham et al., 2011; Inoue et al., 2013) and deposition failure of the barrier layer (Zhang et al., 2015). However, SEM imaging analysis of the cross section of the TSV is destructive, time consuming and depends on the sample-cutting technique (Fursenko et al., 2015). Another nanoscale imaging tool is the atomic force microscope (AFM), which can offer quantitative measurement of surface undulation (Bender et al., 2012; Zhao et al., 2019). Nevertheless, a narrow field of view makes it difficult to conclude an overall evaluation on the etching process. Unlike SEMs and AFMs, which only collect surface information, infrared interferometry and optical coherence tomography detect internal information deep below the surface. The former takes advantage of the interference effect of the monochromatic infrared to display an excellent vertical resolution (Novak & Schmit, 2010). Therefore, it has been applied to TSV depth measurement (Teh et al., 2009). The latter is used to measure the TSV depths for single TSVs and groups of TSVs, in which the TSV structures are considered to be one-dimensional trenches or circular vias with vertical sidewalls and flat bottoms (Iff et al., 2019). Obviously, this is not the real case for practical TSV etching. The transmission electron microscope (TEM) is often reported as a tool for thickness measurement of dielectric layers and diffusion barrier layers because of its extremely high spatial resolution (Bender et al., 2012; Zhao et al., 2019). Although the methods listed above have their advantages, they share the same limitation that the overall 3D information cannot be acquired.

X-ray micro-computed tomography (XMCT) has been included in the material characterization field for decades because of its ability to carry out 3D imaging while maintaining a fine spatial resolution (Landis & Keane, 2010). With the help of XMCT, Choi et al. visualized the spatial position of Cu filling failure caused by Cu seed layer loss (Choi et al., 2014). Niese et al. introduced nano-CT into the examination of voids, detecting voids under 1 µm (Niese et al., 2011). Compared with traditional 2D measurement tools like SEM and TEM, XMCT has two main advantages. Firstly, the ability of 3D analyses at the micrometre scale ensures evaluation of the effects of the actual geometrical parameters of the vias on the following processes and device performance. Secondly, owing to the larger field of view and depth information of the stacked structures in XMCT, more periodic units can be analyzed at the same time, which implies that statistical measurements are achievable for the evaluation of homogeneity of the etched TSV in silicon wafers. Finite-element analysis (FEA), a common tool of simulation in the electrical device field, is often used to test the stability of the designed TSV unit, for example the thermal stability and stress distribution (Zhong et al., 2013), in which geometric models are usually ideal shapes along with scallops obtained from using an SEM. Certainly, better simulation results can be achieved when the ideal models are replaced by real 3D microstructure acquired by XMCT. However, using the traditional absorption contrast of X-rays, it is difficult to resolve the surface profile and roughness of etched silicon vias because silicon is a low-Z material. Furthermore, X-ray diffraction from monocrystalline silicon wafers may also interfere with the contrast of CT projections. In this article, a quantitative analyzing method based on phase-contrast XMCT is developed for the comprehensive evaluation of TSV etching.

2. Experiments

2.1. TSV etching

The TSV microstructures were obtained by conventional photolithography and the Bosch process. Firstly, a 9 µm-thick positive photoresist layer (AZ4620; Shipley Company) was spin coated onto a Si(100) wafer and afterwards patterned by standard photolithography. Then, the pattern of the TSV microstructures was transferred to the silicon layer using the Bosch process, which was performed using a surface process technology Rapier DRIE system. The samples were mechanically clamped to a He backside-cooled radiofrequency (RF) powered (13.56 MHz, 100 W) chuck and subjected to an RF SF₆:C₄F₈ (40 sccm:80 sccm) (standard cubic cm min⁻¹) plasma for 25 min. The chamber was operated at a pressure of 50 mTorr with a source power of 1000 W. By switching the SF₆ and C₄F₈ gases, one can create an anisotropic etching profile. The number of Bosch cycles was 50, resulting in a 4 µm min⁻¹ etching rate. Finally, the residual resist was removed using oxygen plasma ashing and acetone treatment.

2.2. Sample preparation

A piece of wafer obtained after the etching process was selected as the sample for XMCT, in which the diameter of the vias was 33 µm, the etched depth was 100 µm and the period between the vias was 50 µm. To meet the field of view for XMCT, the wafer was cut into 0.9 mm × 0.9 mm cubes. Procedures for the sample preparation are shown in Fig. 1(a). Photoresist was used to cover the wafer in case the debris generated by the grinding wheel fell into the TSV. Later, the cubic piece of wafer was ultrasonically cleaned in acetone to remove photoresist and silicon debris. A top-view image observed using a visible-light microscope is shown in Fig. 1(c), with a magnification of 10×.

Figure 1 Sample preparation and the experimental setup. (a) Procedures for sample preparation. (b) Schematic diagram for X-ray microtomography at BL13W1 of SSRF. (c) A microscopic view of the sample. (d) A photograph of the experimental setup.

2.3. XMCT experiments

The experiments were carried out at BL13W1 X-ray Imaging Beamline of the Shanghai Synchrotron Radiation Facility (SSRF) (Xie et al., 2013; Chen et al., 2014), a 3.5 GeV third-generation synchrotron radiation facility. As shown in Fig. 1(b), a white beam of X-rays is generated by a wiggler, an insertion device of the storage ring, and then monochromatized by a double-crystal monochromator. The size of the X-ray beam was 45 mm (horizontal) × 5 mm (vertical) at 20 keV and was 30 m downstream of the light source. A photograph of the experimental setup is given in Fig. 1(d). The detector used for the data acquisition is an X-ray conversion system composed of a scintillation crystal (LuAG:Ce with a thickness of 100 µm), an optical microscope by Optique Peter (model: MICRX016) and a 2048 pixel × 2048 pixel CMOS detector from HAMAMATSU (model: ORCA-Flash 4.0 C11440). The basic pixel size of the CMOS detector was 6.5 µm, but after 10× optical magnification the effective pixel size was 0.65 µm. The photon energy used for XMCT was set to 18 keV considering a sufficient penetration rate of X-rays through the piece of silicon wafer, and the distance from sample to detector was set to 80 mm to ensure good enough propagation-based phase contrast. In total, 1080 projections were collected over the 180° of rotation, while the exposure time for a projection was set to 0.8 s to reach a compromise between image quality and time consumption.

3. Methods

3.1. Recorrection of abnormal projections caused by diffraction

Considering that the TSV sample is composed of a monocrystal, the incident X-rays on the sample at certain angles during CT scanning will be diffracted, rather than transmitted through the crystal. According to the Bragg equation (Warren, 1990), we have

where d_hkl refers to the crystalline interplanar spacing of crystallographic planes with indices of (hkl), θ refers to the rotation angle during CT data collecting, and Δθ is the difference between the scanning angle of CT projection and the real incidence angle of diffraction. Furthermore, n is the order of diffraction while λ stands for the wavelength of X-rays. X-ray diffraction only occurs if all the parameters conform to this equation. During the rotation of the sample from 0 to 180° with a step size of 0.167°, once a specific θ by chance meets the diffraction condition of a specific family of crystallographic planes (h₀ k₀ l₀), diffraction occurs (Lang, 1959). Assuming that our Si(100) index surface is perfectly perpendicular to the rotation axis, the crystallographic planes which take part in diffraction are limited to those with indices of (0kl). If only the first order of diffraction is taken into account and the rotation angle equals the incidence angle (Δθ = 0), the Bragg equation can be rewritten as

Considering that silicon belongs to the cubic crystal system,

where a stands for the lattice constant for crystal silicon (0.543 nm) (Gražulis et al., 2009) and λ for 18 keV X-rays is 0.069 nm. When k = 1 and l = 1, the rotation angle θ_diffraction at which X-rays are diffracted is 5.155°. Likewise, if k = 1 and l = 2, θ_diffraction = 8.168°, and so on. It is usually the case that the normal of the lattice plane is not perfectly parallel to the rotation axis during data acquisition of the projections, which infers that h is not 0. This means that it is difficult to predict the angle for abnormal projections based on (hkl).

Under these circumstances, the diffracted light does not share the same propagating direction as the transmitted light, which results in abnormal projections [Fig. 2(b)] which are darker than normal ones [Fig. 2(a)]. The angle difference for the two projections shown in Figs. 2(a) and 2(b) is 0.167°, which infers that the neighboring projections usually resemble each other. However, according to the intensity profiles for the blue and red lines indicated in Figs. 2(a) and 2(b), most of the structure details in the abnormal projection were lost which is noted as a typical problem for further image reconstruction of crystalline samples.

Figure 2 Recorrection of abnormal projection images caused by X-ray diffraction from monocrystalline silicon. (a) A normal projection. (b) An abnormal projection at a specific angle. (c) Profiles for the blue and red lines indicated in (a) and (b). (d) Sinogram images before and after diffraction error correction.

To find out all the abnormal projections, a sinogram of a slice is given in Fig. 2(d), showing the variation of a line of pixels according to the rotating angle. The dark lines denoted by red arrows mark those abnormal projections where X-ray diffraction occurs. A total number of 42 abnormal projections appeared during the data acquisition for XMCT, which will lead to information loss and needs to be dealt with carefully before CT image reconstruction for quantitative analysis. Therefore, a recorrection to the abnormal projections is needed before slice reconstruction. Because the condition of Bragg diffraction is strict, projection images taken at the former or latter angles of the Bragg angle are not affected by diffraction phenomena. In our solution to this problem, those abnormal projections were replaced by linear interpolation using projections at neighboring angles, as shown in Fig. 2(d), denoted by the yellow rectangle (before recorrection) and blue rectangle (after recorrection).

3.2. Phase retrieval and slice reconstruction

A software called PITRE developed by our group and open for free download was used to reconstruct the CT slices from projections (Chen et al., 2012). Shown in Fig. 3(a) is a reconstructed CT slice directly from diffraction-recorrected projection images. Because of the effect of propagation-based phase contrast, the interface between silicon and air is greatly enhanced and the edge of vias in TSV etching is clearly presented. However, according to the histogram of the slice shown in Fig. 3(b), only one peak appears which means that the silicon and air cannot be distinguished based on directly reconstructed slices. This implies that detailed quantitative information on TSV etching cannot be achieved in this way. The reason for this is that slices directly reconstructed from projections mainly contain X-ray absorption information, while contrast of absorption is weak in low-Z materials like silicon.

Figure 3 CT reconstruction with and without phase retrieval. (a) A slice reconstructed directly from the unprocessed projections. (b) A histogram of (a). (c) A slice reconstructed from projections with phase retrieval. (d) A histogram of (c). (e) Three-dimensional visualization of TSV etching.

To solve this problem, phase contrast is employed. The complex refractive index n of X-rays in a material can be described as n = 1 − δ + iβ, where δ and β are the refractive index and the absorption index, respectively. For silicon, δ and β at 18 keV X-ray energy are 1.49 × 10⁻⁶ and 7.21 × 10⁻⁹, respectively (Henke et al., 1993). Moreover, δ is ∼200 times the value of β, which indicates that phase contrast is much more sensitive to density difference than absorption contrast. To retrieve the phase information in projections, a phase-attenuation duality Paganin algorithm is used (Gureyev et al., 2004; Chen et al., 2011, 2013),

where I_z,θ is the projection at the rotation angle θ with a sample-to-detector distance of z, while φ_θ(x,y) is the corresponding phase-retrieved projection. Furthermore, ∊ is the ratio of δ and β, λ is the wavelength of X-ray, and (ξ, η) refer to the spatial frequencies in the Fourier space corresponding to a point (x, y) in real space. After retrieving all the 1080 phase projections, the 3D refractive index distribution δ(x,y,z) can be reconstructed by applying the standard filtered back-projection algorithm to φ_θ(x,y) (Chen et al., 2011), which is

where * denotes a 1D convolution and ν is the CT reconstruction filter. Finally, the reconstructed slice of the silicon vias after phase retrieval is shown in Fig. 3(c), while the correspondent histogram is given in Fig. 3(d). From Fig. 3(d), two peaks appear separately which means that two kinds of materials, i.e. silicon and air, are explicitly differentiated. Accordingly, silicon can be precisely extracted from slices using a simple thresholding method, which is essential to the following 3D visualization and quantitative analysis.

3.3. 3D visualization

For 3D quantitative analysis, the reconstructed slices were imported into the commercial software Avizo, which provides 3D visualization and further detailed measurement and analysis. Firstly, thresholding and segmentation were conducted to separate the silicon base and vias. Shown in Fig. 3(e) is the reconstructed 3D microstructure of the TSV etching, in which the blue part represents the silicon base while cylinders rendered by multiple colors stand for vias. Different colors are used to distinguish vias from one another. A complete overview of the animation is shown in Movies 1 and 2 (see the supporting information).

4. Quantitative analyses

When TSVs are electroplated with copper, their geometrical deviations, especially the depth of the vias, can affect the coplanarity and warp the wafer, resulting in a lower stacking yield. The sidewall roughness impacts dielectric, barrier and Cu seed layer coverage by enhancing the voids in the TSV. The accurate non-destructive measurement of geometrical parameters in TSV etching, including diameters, depths and surface profile, is critical to the evaluation of their effect on the following process. Taking advantage of XMCT, non-destructive imaging of the 3D microstructure of the TSV etching with a relatively large field of view is applicable. As a result, 3D quantitative characterizations of the vias are practicable and can be elaborated in the order of complexity from basic geometry parameters to detailed sidewall profile errors, including local morphology and overall statistics.

4.1. Outline of TSV etching

Consistency of the vias during TSV etching is critical for the evaluation of the etching process. To ensure the stable operation of the 3D ICs, the errors of every TSV should meet the criteria in order to reduce the risk of interconnecting failure. Geometrical parameters including diameter, depth and curvature of the bottom were statistically analyzed [Fig. 5(a)]. In this work, unlike the 2D results measured with SEMs and TEMs, these parameters were acquired using a 3D model reconstructed from phase-contrast XMCT. Firstly, for the diameter measurement, the equivalent diameter of a via was calculated from the average value of the actual areas in all slices because of the variation of diameters along depth orientation. After counting all 196 vias, the range of equivalent diameters lies from 31.9 to 33.6 µm with a mean value of 32.5 µm and a standard deviation of 0.3. A histogram of the diameters is given in Fig. 4(b) and a distribution map is shown in Fig. 4(c). On the one hand, the standard deviation is only ∼1% of the mean value, which indicates high uniformity. On the other hand, vias at four corners appear to be a bit larger than those inside, which may result from the X-ray scattering in a complex microstructure.

Figure 4 Statistics for the consistency of TSV etching. (a) Measured parameters in a cross section. (b, d, f) Histograms of diameter, bottom curvature radius and depth of vias. (c, e, g) Distribution maps of parameters measured from 196 vias.

The bottom corner notch is located in the transitional part between sidewall and bottom [marked with yellow arrows in Fig. 4(a)], which is usually one of the key factors for Cu seed layer loss (Choi et al., 2014). The bottom of the vias is a curved surface which can be approximately considered to be spherical; therefore, higher curvature usually causes a smaller gradient of transition, e.g. a weaker corner notch. Quantitative analyses of the bottom curvature were carried out to evaluate the effect of the corner notch. According to the 3D microstructure of the reconstructed vias, a perfect spherical model with a radius of r was created to be tangent to the bottom surface at the center of the bottom. The root mean square of difference (RMSD) between the spherical model and the real bottom surface is defined and the specific r of the spherical model which can achieve the minimum value of RMSD is chosen as the curvature radius of the bottom surface. A histogram of the curvature radius from all 196 vias is shown in Fig. 4(d). The average curvature radius of the bottom is 56.7 µm and the standard deviation is 1.5 µm, which is ∼2.65% of the average value. From the distribution map of curvature radius given in Fig. 4(e), we found that vias with larger radii were mainly located in the lower right corner. This phenomenon shows no sign of symmetry, which infers that the distribution may result from uniformity of the ion-etching process. Similar things happened in depth analysis, which is obtained by measuring the length between the top surface of the sample and the center point of the curved bottom. The histogram presented in Fig. 4(f) has a tail at the larger-depth side, which corresponds to the lower left edge of the distribution map given in Fig. 4(g). Though the standard deviation of 1.32% in via depth is good enough for the TSV etching process, the standard deviation of 1.4 µm and maximum deviation of ∼10 µm may lead to stresa s imbalance among the IC plates in operation, which implies a risk to system reliability.

4.2. Via taper angle

The quality of subsequent processes like metallization with sputtering is sensitive to the taper angle θ of the sidewall (Lin et al., 2015). By altering the standard process settings of the Bosch process, in combination with isotropic etching step, the cross section along the depth direction can be simply classified into two shapes: trapezoid [Fig. 5(a) top] and inverted trapezoid [Fig. 5(a) bottom]. Common SEM or TEM examination can calculate θ by directly measuring the angle of two walls, but this angle will depend on how the cross section is cut. In addition, the sidewall of a via is a 3D curved surface, so measuring from one section may not reflect the real situation. The cross section of the vias at the slices reconstructed by XMCT at different depths is used to calculate the equivalent diameter of the vias. Shown in Fig. 5(b) is the via diameter along the depth direction, in which the tendency of diameter change along the depth orientation is explicitly revealed. With the effect of the curved bottom removed, the taper angle is obtained according to the lower and upper diameters, 2θ = 0.869°, where 2θ is used because the diameter is twice the radius. Furthermore, statistical analysis of all 196 vias was carried out and the results are given in Figs. 5(c) and 5(d). The histogram of θ appears as a normal distribution with a maximum tilting angle of 0.467° and a minimum angle of 0.383°. Considering that the mean value of θ is lower than half a degree with a standard deviation of 0.015 and the distribution map in Fig. 5(e) appears to be random, we can conclude that the sidewall trapezoid and its consistency is good enough.

Figure 5 Diagram of sidewall trapezoid analysis, where (a) two types of trapezoid shape resulted from different etching techniques. (b) Equivalent diameter distribution along depth. (c) Histogram of taper angle θ. (d) Taper angle θ distribution among 196 vias.

4.3. Sidewall profile

The surface profile of the via sidewall may lead to Cu seed layer loss before electroplating of TSV. In the above-mentioned analysis of the diameter of the hole, an area formula for a via cross section is employed to achieve the equivalent diameter, in which the vias are taken to be perfectly round. Shape error is also defined to evaluate the deviation of the actual surface to the ideal round section of the via. Firstly, coordinates of surface voxels on the sidewall were extracted from a 3D reconstructed model. Then, the Cartesian coordinate system was replaced by a cylindrical coordinate system, which made it easy to calculate the distance (ρ) between every voxel and the central axis. The location of the central axis is determined by the center of gravity in the 3D model. A diagram of this coordinate system is shown in Fig. 6(a), where the blue ellipse represents the actual profile while the red circle stands for the reference circle with an equivalent radius r, which is the half value of the diameter at each depth shown in Fig. 5. Once ρ and r become known, the profile error is obtained according to the difference ρ − r. Finally, the sidewall is unfolded to a flat surface and the profile error is shown accordingly by pseudocolor, as seen in Figs. 6(b)–6(d).

Figure 6 Sidewall profile of the TSV etching. (a) Diagram of profile error and sidewall unfolding. (b)–(d) ρ − r maps of vias with fine, medium and poor profile errors. (e) Histogram for RMS value of ρ − r. (f) Distribution map of RMS value for ρ − r among 196 vias.

Three vias have been selected as representatives of vias with fine, medium and poor profile errors among all vias [Figs. 6(b)–6(d)]. For the via with a poor profile error, obvious local amassing of errors at the sidewall is observed which may lead to abnormal thermo-strain in the TSV, while in the medium case only one area with obvious amassing is observed. The maximum/minimum profile errors in these cases are listed as follows: fine, 1.0 µm/−2.3 µm [Fig. 6(b)]; medium, 1.6 µm/−2.5 µm [Fig. 6(c)]; and poor, 2.5 µm/−4.0 µm [Fig. 6(d)]. Intuitively, a larger profile error tends to have more obvious variations in color from blue to red, while figures with a lower value are featured with mild change nearer to yellow. Owing to this ρ − r map, two kinds of information about sidewalls can be achieved. The fluctuation of colors along the angle θ axis reveals how `round' a cross section is, while colors along the via depth describe how `vertically straight' the sidewall is.

After extracting the ρ − r information of all the vias, statistical analysis is also carried out. Accordingly, a parameter is needed to estimate the overall profile error of each via, in other words to quantitatively describe `fine' or `poor'. RMS has been widely used in surface-roughness analysis, which is more accurate than using the simple mean value. Similarly, the RMS value of ρ − r is obtained according to the following formula,

where n stands for the total pixel number counted in the ρ − r map of each via (Aloisio et al., 2015; Fu et al., 2018). Fig. 6(e) shows a histogram of the RMS profile error among the whole 196 vias, in which the maximum and minimum are 1.3 µm and 0.9 µm, respectively. The average profile error of all the vias is 1.1 µm with a standard deviation of 0.1 µm. Compared with the via diameter of 33.4 µm, the relative profile deviation is ∼3%. The spatial distribution of the RMS profile error is shown in Fig. 6(f), in which vias with larger profile errors locate at the central part of the sample.

5. Conclusions

TSV with voids may lead to electrical failure and provide a risk to reliability. As the first process of TSV manufacture, the quality of TSV etching in silicon will affect the following processes, including copper seeding and electroplating. Three-dimensional characterization and evaluation of TSV etching is essential for the improvement of the TSV based integrated circuits. Traditional methods like using SEMs, TEMs and light microscopes can only provide certain parameters like surface roughness, via depth and sectional diameter. A comprehensive method for the systematic evaluation of TSV etching is absent at present. Taking advantage of XMCT, non-destructive imaging and further quantitative analysis of the high-resolution 3D microstructures of the etched vias is possible. In this article, a method based on XMCT is developed for the systematic evaluation of the TSV etching. A piece of DRIE silicon wafer is taken as the sample and a complete workflow, ranging from sample preparation, image acquisition and processing, silicon diffraction correction, 3D visualization, to finally the systematic quantitative analyses of the TSV etching, is given in detail.

Microstructure characterization of separate vias and statistical analysis on the consistency of group vias are achieved by this method. Parameters including diameter, bottom curvature radius and depth were statistically analyzed based on the 196 silicon vias in the field of view of XMCT. The average diameter of the vias was 32.5 µm while the standard deviation was 0.3 µm, which means that the consistency of the TSV etched diameter is less than 1%. The curvature radius of the bottoms is 56.7 µm with a standard deviation of 1.5 µm, e.g. less than 2.6% deviation. The relatively flat bottom compared with the diameter of the vertical sidewall may result in more copper seed loss at the notch connecting the sidewall and the bottom. The average depth is 102.6 µm with a standard deviation of 1.4 µm. Considering that the deviation is only 1.3% and the absolute depth deviation is smaller than 2 µm, stress can be avoided among integrated circuits. The equivalent diameter at all sections along the depth direction of one etched via is given according to the microstructure of XMCT and a via taper angle of 0.42° with a standard deviation of 0.015 is obtained accordingly. Sidewall profile or roughness is the critical parameter to judge the quality of TSV etching, which will directly lead to thermo-stress of the TSV. In the analysis of the sidewall profile, silicon vias with poor, medium and fine surface quality are selected and the results show that the RMS of the maximum surface error is 1.3 µm and the minimum is 0.9 µm. Compared with the average radius of 16.2 µm, the deviation of sidewall to ideal surface is 5.6% even when the minimum error of 0.9 µm is used for the calculation. This means that the sidewall profile error may be the most important factor that affects the following copper seeding and electroplating processes. The average sidewall profile error is 1.1 µm with a standard deviation of 0.1 µm.

The advantage of the XMCT based method lies in its capability to conduct simultaneous evaluation of the local morphology and the overall statistics of the geometrical parameters, which is difficult to accomplish using other methods. Furthermore, the 3D reconstructed microstructure of the TSV can be combined with FEA, which can provide more accurate mechanical and electrical simulations. X-ray computed lamino­graphy is a practical method to avoid sample preparation for the defect inspection in printed circuit boards (Moore et al., 2002). However, owing to the geometry and anisotropy of the unsampled region in reciprocal space, the achievable spatial resolution in lamino­graphy is limited to some extent which prevents its application in high-precision analysis (Helfen et al., 2005). Currently, TSV diameters have shrunk to only a few micrometres in many cases, so the accurate non-destructive measurement of TSV parameters is an increasingly challenging task. X-ray nanoscopic CT combined with X-ray microscopic CT should be a good solution to this issue.